The electronics industry has experienced an ever increasing demand for smaller and faster electronic devices which are simultaneously able to support a greater number of increasingly complex and sophisticated functions. Accordingly, there is a continuing trend in the semiconductor industry to manufacture low-cost, high-performance, and low-power integrated circuits (ICs). Thus far these goals have been achieved in large part by scaling down semiconductor IC dimensions (e.g., minimum feature size) and thereby improving production efficiency and lowering associated costs. However, such scaling has also introduced increased complexity to the semiconductor manufacturing process. Thus, the realization of continued advances in semiconductor ICs and devices calls for similar advances in semiconductor manufacturing processes and technology.
Toward that end, high-mobility materials (e.g., III-V materials, germanium, and silicon germanium) are being researched and have gained considerable interest as silicon-channel replacements. Such interest is largely due to the high intrinsic carrier mobility of high-mobility materials in comparison to silicon. Some advantages of using materials with a higher intrinsic mobility include increased device drive current (e.g., even at reduced supply voltages), reduced intrinsic delay, improved high-frequency performance (e.g., for radio-frequency applications), as well as other benefits as known in the art.
However, high-mobility materials may also have a low transport effective mass and a reduced bandgap (e.g., as compared to silicon). A reduced bandgap and low transport effective mass implies that band-to-band tunneling (BTBT) current in the subthreshold regime will be high and will be much higher than for silicon. Further, because BTBT current does not exponentially decrease with decreasing gate voltage (e.g., as compared to thermionic emission), the BTBT current will set a minimum leakage current level. Thus, high-mobility materials may only be used in high performance (HP) devices, which can sustain larger leakage currents, as compared to low operating power (LOP) or low standby power (LSTP) devices, which require much lower leakage current levels. Yet, industry requirements call for all three device types (HP, LOP, and LSTP) to be available on a single integrated circuit (IC) chip, necessitating the integration of different technologies (i.e., materials, devices, etc.) on the same chip. For example, HP devices may be implemented using high-mobility materials, while LOP and LSTP devices are implemented using silicon, all on a single chip. Such integration of different technologies adds additional cost, complexity, and process challenges (e.g., non-compatible thermal budgets). Thus, existing techniques have not proved entirely satisfactory in all respects.